Description: Apple II and IIe: Interface I/O Signal Timing (2/97) Header: Apple II and IIe: Interface I/O Signal Timing (2/97) Article Created: 21 September 1984 Article Reviewed/Updated: 28 February 1997 TOPIC ----------------------------------------------------------- This article describes how the I/O strobe signals on the Apple II peripheral connector are handled. DISCUSSION ------------------------------------------------------ The I/O strobe signals on the Apple II peripheral connector are decoded from the appropriate address lines and combined with the phase one clock. This is to reduce the TTL circuitry required to build a simple I/O port. _______________ _____ CLOCK 1 _______| |_______________| I/O SELECT _______________________ _____ I/O STROBE |_______________| DEVICE SELECT A simple 8 bit output port would be a positive edge triggered latch with the clock tied to I/O select. 74LS374 __________ | | GND -----------------| 1 | I/O STROBE ----------|11 | | | D0 ------------------| 3 2|--- D1 ------------------| 4 5|--- D2 ------------------| 7 6|--- D3 ------------------| 8 9|--- 8 bits of D4 ------------------|13 12|--- Latched TTL D5 ------------------|14 15|--- Output D6 ------------------|17 16|--- D7 ------------------|18 19|--- |__________| Assumming that this interface is plugged into slot 1, any write operation to $C090..$C09F will transfer the data to the output lines. This is a very simple interface, so any read to $C090..$C09F will transfer random data to the output latch and to the Apple. Article Change History: 28 Feb 1997 - Reviewed for technical accuracy, revised formatting. Copyright 1984-97, Apple Computer, Inc. Keywords: