TWGS - How to upgrade your 8k Cache to 32k

You can use REV A GALs in your TransWarp GS. GAL Revisions were
primarily to deal with bugs, or anomolies in the original '816 design.
As things went faster certain instructions or in most cases, sequences
of instructions would break down at faster speeds. The reason for the
'2 MHz' over ability of the Zip GSX was because the Gate Array took
into consideration these flaws and delt with them on a realtime basis,
slowing down or waiting for instruction completion before continuing.
The Original '816 was never pushed past 10 MHz as an official number.
You could get Engineering Samples of newer lots that each had been hand
tested for performance spec and included with each was a sheet with the
test results. 

Some of these chips were good to as high as 12, 13 MHz. Because the Zip
GSX handled things the way it did, they could get alteast a MHz or 2
over the rating, but not without a price. One of the things required to
get more from the chip was increase the voltage supplied. The
technology the Apple IIgs is based on runs at primarily +5VDC. If you
put much higher octane fuel in your car, your engine may run really
great. In the long run however, more stress is put on it and it may not
last as long or wear things out faster. The same thing applies here
except that there are no moving parts, things don't wear out as such
but do become less and less reliable and at a point in time will cease
to be useful. Most people that have modified ZipGSX boards with voltage
increases are now using them back at slower speeds or even not at all
due to increased unreliabilty. The ZipGSX has provisions on the card
for isolating power to the CPU and adding a regulator to the board with
the addition of some Ohms Law principals the desired voltage can be
obtained and the CPU speed boosted. The TransWarp GS was not setup for
this. As the engineers experimented and these higher speed yielding
CPUs became more available, since a voltage increase was not mandatory,
things were changed within the logic for the TransWarp GS to deal with
faster clock speeds. The GAL Revisions also delt with some other
compatibility issues.

The following is hearsay from me based on my experiences. I have never
had a problem with compatibility between a TransWarp GS and say, the
RAMFast SCSI card. What I classify as a compatibility issue is any
condition that results in data corruption that can be DUPLICATED at ANY
TIME, ON DEMAND. Anything else is just that, anything else. The Nature
of the Apple II design is that things are being done in ways not
normal. Face it, the Apple II is a hack of the earliest kind. There is
not a CPU clock in the Apple ][, it is generated by logic. This and of
itself is basis for the entire Apple II family to maintain
compatibility from day one. Faster CPU chips were not available in any
real kind of supply, as a marketer, AE had to mass market what was
available in mass quantity. So, while catering to those hardware nuts
and AE's own internal quest to incease speed and overall performance of
it's products, the GAL updates could not really be 'marketed' as speed
improvements without bogging down their technical support dept with
more curiosity seekers, the perverbial can of worms, if you will.

In a nutshell, what I am getting at is that GAL revisions were things
such as watchdog logic, conditional and check points for instruction
and operations. Certain functions are more taxing than others and at
the edge of the threshold, these limitations show through. With
extensive testing these limitations were brought to the surface and
delt with. Zip Technology had a much greater understanding of the core
of the '816 than AE did in the beginning. In a game of cat and mouse,
each would try to out do each other. Since the TransWarp GS is designed
with descrete components it can be upgraded, as was done. The Zip GSX
on the other hand was designed with a stamped VLSI that contained the
gernal logic and custom gate array. No upgrades were possible without
changing of the die. Using a complete set of Rev A GALs in your TWGS,
along with the Sanyo '816 design allows for un metered flow of
instructions through your TWGS. Speeds of 16+ MHz are obtainable in
this configuration. The Cache RAM module needs to be upraded for this
to happen as well. The following pages contain this information.

TransWarp GS 8K Cache Module w/32K Installed 

Original TransWarp GS 8K Cache board with 32K Installed. The hardest
thing to find are faster 32Kx8 SRAMs in the 600 mil (wide) 28 pin DIP
package. The ERPOM above is a 600m size and the SRAMs installed on this
board are 300m. The Zip GSX board is setup to hold either size with the
addition of a proper socket. There are adapters available for the using
300m chips in a 600m socket but these would be thicker than the entire
TWGS card and reach into the next two slots over. Since space is not a
luxury within the Apple IIgs case this is not an option for most
people. As you can see, spreading the leads of the 300m package will
reach, barely reach, but reach the holes on the board. Since these are
soldered chips you should have a way to test these SRAMs thoroughly
before assembling this project. To give yourself some more reach, if
you cut the 8K Chips out from the TOP OF THE LEADS instead of at the
base you can bend over the remaining toward the center and solder to
the top of these. I did not do it this way, but rather I removed the
chips entirely from the board. In the lower left and upper right you
will need to place some sort of separator under the chip and right up
to the edge of the holes in the board because potential shorts due to
exposed leads being so close to the board. There are no vias in the
area under the upper right SRAM so there are no concerns there.
                                                                                                                                           Modifications
There are five configuration bow-ties on the TWGS Cache card. Three of
those five need to be modified. From the right, the first one needs to
be cut or opened. The second one needs to closed (connected) and the
fourth one needs to be closed. The resistor shown can be removed
completely. In this picture it is cut and pushed to one side. The
traces on this cache card are very small and covered over by a good
coat of solder mask. What does this mean? You can stab yourself really
easily trying to cut open that trace if you do not know what your
doing. The BEST way to do it is with a pointy soldering iron tip, hot,
push the center of the connection while rotating the iron. This
heats up the traces, and the rotation will separate them. To join the
open jumpers you will need to scrape off the solder mask from above the
traces, you need to see copper before you can solder here. The stab
rule applies equally here too. Using a small flat screwdriver (NOT a
blade) scratch the mask off the top of the traces. Most anything you
solder here will probably be bigger than what your soldering to. I use
component leads (resistor, cap, etc.) for jumpers. The best way to do
this is with the lead still attached to the resistor, (so you have a
handle) solder the thing until it sticks to both sides, check with a
meter and then cut off the resistor. Again, these traces are very
fragile once the mask is exposed and after you have soldered to them.
It does not take much to peel them off the board. In addition to all
these modifications you will need to obtain a version 1.8S EPROM.

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